Semiconductor devices are found in many products in the fields of entertainment, communications, networks, computers, and household markets. Semiconductor devices are also found in military, aviation, automotive, industrial controllers, and office equipment. The semiconductor devices perform a variety of electrical functions necessary for each of these applications.
The manufacture of semiconductor devices involves formation of a wafer having a plurality of die. Each semiconductor die contains hundreds or thousands of transistors and other active and passive devices performing a variety of electrical functions. For a given wafer, each die from the wafer typically performs the same electrical function. Front-end manufacturing generally refers to formation of the semiconductor devices on the wafer. The finished wafer has an active side containing the transistors and other active and passive components. Back-end manufacturing refers to cutting or singulating the finished wafer into the individual die and then packaging the die for structural support and environmental isolation.
One goal of semiconductor manufacturing is to produce a package suitable for faster, reliable, smaller, and higher-density integrated circuits (IC) at lower cost. Flip chip packages or wafer level packages (WLP) are ideally suited for ICs demanding high speed, high density, and greater pin count. Flip chip style packaging involves mounting the active side of the die facedown toward a chip carrier substrate or printed circuit board (PCB). The electrical and mechanical interconnect between the active devices on the die and conduction tracks on the carrier substrate is achieved through a solder bump structure comprising a large number of conductive solder bumps or balls. The solder bumps are formed by a reflow process applied to solder material deposited on contact pads which are disposed on the semiconductor substrate. The solder bumps are then soldered to the carrier substrate. The flip chip semiconductor package provides a short electrical conduction path from the active devices on the die to the carrier substrate in order to reduce signal propagation, lower capacitance, and achieve overall better circuit performance.
FIGS. 1a-1b show a conventional flip chip configuration with a solder mask dam disposed between the bond pads. In FIG. 1a, a semiconductor die or flip chip 10 is shown for mounting to chip carrier substrate or printed circuit board (PCB) 14. The PCB contains a plurality of bonding pads 18. Flip chip 10 includes a plurality of solder bumps 12 disposed on a backside of the die for interconnect to external devices. Flip chip 10 is mounted to PCB 14 in FIG. 1b. Solder bumps 12 are formed on bonding pads or under bump metallization layer (UBM) 15. An insulating layer 16 is formed on the backside of flip chip 10 over UBM 15. A portion of insulating layer 16 is removed to attach solder bumps 12 to UBM 15. A solder mask dam 20 is formed on substrate 14. Solder bumps 12 are then metallurgically and electrically connected to bond pads 18 on substrate 14. The solder mask dam contains the solder reflow over the bond pads.
Many flip chip designs call for a fine pitch, e.g., less than 150 micrometers (μm), between the interconnect structures, such as the solder bump pads and signal traces on the PCB, for a higher interconnect density and input/output (I/O) terminal count. The solder mask dam requires more lateral space and therefore limits the solder bump and signal trace pitch. Without a solder mask dam, the solder could bridge or short to adjacent signal traces during the solder reflow process to join the flip chip to the PCB. For example, solder bumps 12 are shown in FIG. 2 as being metallurgically and electrically connected to the intended bond pads 18 using a solder reflow process. During solder reflow in a fine pitch design, the solder material may extend over the adjacent signal traces 22 due to misalignment or irregular bump diameter. In this case, solder bumps 18 would electrically bridge or short to signal traces 22 causing a defect.
While most flip chip PCBs are fabricated with solder on pad (SOP) printing to make robust solder joints on the bond pad, in case of fine pitch bonding, the SOP treatment of controlled collapsible chip connection (C4) is limited due to potential solder bridges between adjacent interconnect structures.